CMOS image sensor and method for manufacturing the same

ABSTRACT

A CMOS image sensor is provided. The CMOS image sensor incorporates a semiconductor substrate having a photodiode area and a transistor area; a trench area formed in the photodiode area; a transistor and a floating diffusion area formed on the transistor area; a first conductive type diffusion area formed on the photodiode area; and a second conductive type diffusion area formed on the trench area above the first conductive diffusion area.

RELATED APPLICATION

This application claims the benefit under 35 U.S.C. §119(e), of KoreanPatent Application Number 10-2005-0095899 filed Oct. 12, 2005, which isincorporated herein by reference in its entirety.

FIELD OF THE INVENTION

The present invention relates to a complementary metal oxidesemiconductor (CMOS) image sensor.

BACKGROUND OF THE INVENTION

In general, an image sensor is a semiconductor device for convertingoptical images into electric signals, and is typically classified as acharge coupled device (CCD) or a CMOS image sensor.

The CCD has a plurality of photodiodes (PDs), which are arranged in theform of a matrix in order to convert optical signals into electricsignals. The CCD includes a plurality of vertical charge coupled devices(VCCDs) provided between photodiodes and vertically arranged in thematrix so as to transmit electrical charges in the vertical directionwhen the electrical charges are generated from each photodiode; aplurality of horizontal charge coupled devices (HCCDs) for transmittingin the horizontal direction the electrical charges that have beentransmitted from the VCCDs; and a sense amplifier for outputtingelectric signals by sensing the electrical charges being transmitted inthe horizontal direction.

However, such a CCD has various disadvantages, such as a complicateddrive mode, high power consumption, and so forth. Also, the CDD requiresmulti-step photolithography processes, so the manufacturing process forthe CCD is complicated.

In addition, since it is difficult to integrate a controller, a signalprocessor, and an analog/digital converter (A/D converter) onto a singlechip of the CCD, the CCD is not suitable for compact-size products.

Recently, the CMOS image sensor has been spotlighted as thenext-generation image sensor capable of solving problems of the CCD.

The CMOS image sensor is a device that employs a switching mode tosequentially detect an output of each unit pixel by means of MOStransistors using peripheral devices, such as a controller and a signalprocessor. The MOS transistors are formed on a semiconductor substratecorresponding to the unit pixels through a CMOS technology.

That is, the CMOS sensor includes a photodiode and a MOS transistor ineach unit pixel, and sequentially detects the electric signals of eachunit pixel in a switching mode to realize images.

Since the CMOS image sensor makes use of the CMOS technology, the CMOSimage sensor has advantages such as low power consumption and a simplemanufacturing process with a relatively smaller number ofphotolithography processing steps.

In addition, the CMOS image sensor allows the product to have a compactsize, because the controller, the signal processor, and the A/Dconverter can be integrated onto a single chip of the CMOS image sensor.

Therefore, CMOS image sensors have been extensively used in variousapplications, such as digital still cameras, digital video cameras, andso forth.

Meanwhile, in the conventional CMOS image sensor, the saturation levelof the unit pixel is determined according to the capacitance ratiobetween the photodiode and a floating diffusion area. In order toimprove the saturation level, capacitance of the photodiode must behigher than that of the floating diffusion area.

However, since the capacitance of the floating diffusion area may exertan influence upon characteristics of various transistors, it can beundesirable to change the capacitance of the floating diffusion area.

Accordingly, it is necessary to increase the capacitance of thephotodiode. However, since the chip size must be enlarged to increasethe capacitance of the photodiode, there are limitations to improve thesaturation level of the unit pixel.

SUMMARY OF THE INVENTION

An object of the present invention is to provide a CMOS image sensor anda method for manufacturing the same, capable of improving the saturationlevel of a unit pixel by enlarging a surface area of a depletion layerformed in a photodiode such that capacitance of the photodiode can beincreased.

According to one aspect of the present invention, there is provided aCMOS image sensor comprising: a semiconductor substrate having aphotodiode area and a transistor area; a trench area formed in thephotodiode area; a transistor and a floating diffusion region formed onthe transistor area; a first conductive type diffusion region formed onthe photodiode area; and a second conductive type diffusion regionformed on the trench area above the first conductive type diffusionregion.

According to another aspect of the present invention, there is provideda CMOS image sensor comprising: a semiconductor substrate having anactive area and an isolation area; a photodiode area and a floatingdiffusion region formed in the active area; a transfer transistor fortransferring photo-charges from the photodiode area to the floatingdiffusion region; and a plurality of trenches formed on a surface of thephotodiode area

According to still another embodiment of the present invention, there isprovided a method for forming a CMOS image sensor, the methodcomprising: defining a photodiode area on an active area of asemiconductor substrate and forming a plurality of trenches in thephotodiode area; forming a gate insulating layer and a gate electrode onthe active area; forming a first conductive type diffusion region byimplanting a dopant into the photodiode area; forming a spacer at a sideof the gate electrode; forming a first conductive type floatingdiffusion region by implanting a dopant into the active area; andforming a second conductive type diffusion region by implanting a dopantinto the photodiode area.

BRIEF DESCRIPTION OF THE DRAWINGS

The accompanying drawings, which are included to provide a furtherunderstanding of the invention and are incorporated in and constitute apart of this application, illustrate embodiment(s) of the inventiontogether with the description, and serve to explain the principle of theinvention.

FIG. 1 is a circuit view illustrating a unit pixel of a CMOS imagesensor including four transistors and two capacitors according to anexemplary embodiment of the present invention;

FIG. 2 is a layout view illustrating a unit pixel of a CMOS image sensoraccording to an exemplary embodiment of the present invention;

FIG. 3 is a sectional view taken along line A-A of FIG. 2 to illustratea photodiode part of a unit pixel and a transfer transistor according toan embodiment of the subject invention; and

FIGS. 4A to 4G are sectional views illustrating the procedure formanufacturing a CMOS image sensor according to an exemplary embodimentof the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Hereinafter, a preferred embodiment of the present invention will bedescribed with reference to the accompanying drawings.

CMOS image sensors are typically classified as 3T, 4T or 5T-type CMOSimage sensors according to the number of transistors formed in a unitpixel. The 3T-type CMOS image sensor includes one photodiode and threetransistors, and the 4T-type CMOS image sensor includes one photodiodeand four transistors.

In the following description of the present invention, the 4T-type CMOSimage sensor will be used as an example to explain the CMOS image sensorand the manufacturing method thereof. The layout for the unit pixel ofthe 4T-type CMOS image sensor is as follows:

FIG. 1 is a circuit view illustrating a unit pixel 100 of a CMOS imagesensor including four transistors and two capacitors according to anexemplary embodiment of the present invention.

FIG. 1 shows the unit pixel 100 of the CMOS image sensor including aphotodiode PD 10 for detecting light and four NMOS transistors. The fourNMOS transistors include a transfer transistor 20, a reset transistor30, a drive transistor 40 and a select transistor 50.

As shown in FIG. 1, from among the four NMOS transistors, the transfertransistor 20 transfers a signal to transmit photo-charges generatedfrom the photodiode 10 to a floating diffusion region FD, the resettransistor 30 transfers a signal to reset the floating diffusion regionto a level of a supply voltage V_(DD), the drive transistor 40 serves asa source follower, and the select transistor 50 receives a pixel dataenable signal so as to transmit a pixel data signal.

A load transistor 60 can be electrically connected to an output terminal70 of the unit pixel 100. In FIG. 1, Tx refers to a gate voltage of thetransfer transistor 20, Rx refers to a gate voltage of the resettransistor 30, Dx refers to a gate voltage of the drive transistor 40,and Sx refers to a gate voltage of the select transistor 50.

FIG. 2 is a layout view illustrating the unit pixel of the CMOS imagesensor according to an exemplary embodiment of the present invention.

As shown in FIG. 2, the unit pixel 100 includes an active area, which isshown in a solid line, and an isolation area having an isolation layerand being formed at an outside of the active layer.

A gate 23 of the transfer transistor 20, a gate 33 of the resettransistor 30, a gate 43 of the drive transistor 40, and a gate 53 ofthe select transistor 50 can be aligned above the active area whilecrossing the active area.

Referring to FIGS. 1 and 2, the unit pixel 100 of the CMOS image sensorhaving the above structure operates as follows:

First, the reset transistor 30, the transfer transistor 20, and theselect transistor 50 can be turned on, thereby resetting the unit pixel100.

At this time, depletion of the photodiode 10 occurs, so that carriercharge is generated. The floating diffusion region FD is charged withcarriers to a level of the supply voltage V_(DD).

Then, the transfer transistor 20 can be turned off, and the selecttransistor 50 can be turned on. After that, the reset transistor 30 canbe turned off.

In this state, a controller can read the output voltage V1 from theoutput terminal 70 of the unit pixel 100 and can store the outputvoltage V1 in a buffer. Then, the controller can turn on the transfertransistor 20 so as to shift carriers of a capacitor Cp, which ischarged according to intensity of light, into a capacitor Cf After that,the controller reads out the output voltage V2 from the output terminal70 of the unit pixel 100 and can convert analog data for the outputvoltages V1 and V2 into digital data, thereby completing one operationalperiod of the unit pixel 100.

FIG. 3 is a sectional view taken along line A-A of FIG. 2 to illustratean embodiment of a photodiode part of the unit pixel and the transfertransistor.

As shown in FIG. 3, the CMOS image sensor according to an embodiment ofthe present invention can include a p type epitaxial layer 102 formed ona p⁺⁺ type conductive semiconductor substrate 101, on which an activearea having a photodiode area and a transistor area, and an isolationarea are defined. An isolation layer 103 can be formed on the isolationarea in order to define the active area of the semiconductor substrate101. A plurality of trenches 105 can be formed having a predetermineddepth while being spaced apart from each other by a predeterminedinterval in the photodiode area of the semiconductor substrate 101. Agate electrode 107 can be formed on the active area of the semiconductorsubstrate 101 by interposing a gate insulating layer 106 therebetween. Alow-density n⁻ type diffusion region 109 can be formed on the photodiodearea in the vicinity of the gate electrode 107. A spacer 110 can beformed at a side of the gate electrode 107. A high-density n⁺ typediffusion region (floating diffusion region) 112 can be formed on thetransistor area at the other side of the gate electrode 107. A p⁰ typediffusion region 114 can be formed on the surface of the trench 105 inthe semiconductor substrate 101 on which the low-density n⁻ typediffusion region 109 is formed.

FIGS. 4A to 4G are sectional views illustrating a method formanufacturing the CMOS image sensor according to an exemplary embodimentof the present invention.

As shown in FIG. 4A, a low-density p⁻ type epitaxial layer 102 can beformed on a high-density p⁺⁺ type conductive semiconductor substrate 101through an epitaxial process.

Then, after defining an active area and an isolation area on thesemiconductor substrate 101, the isolation layer 103 can be formed onthe isolation area of the semiconductor substrate 101 by, for example,performing an STI (shallow trench isolation) process.

Although it is not illustrated in figures, the isolation layer 103 canbe formed as follows:

First, a pad oxide layer, a pad nitride layer, and a TEOS(tetra-ethyl-ortho-silicate) oxide layer can be sequentially formed onthe semiconductor substrate. A photoresist film can be coated on theTEOS oxide layer.

Then, an exposure and development process can be performed with respectto the photoresist film by using a mask having a pattern for defining anactive area and an isolation area, thereby patterning the photoresistfilm. Through this photolithography process, the photoresist film formedon the isolation area can be removed, exposing the TEOS oxide layer.

After that, the pad oxide layer, the pad nitride layer and the TEOSoxide layer formed on the isolation area can be selectively removedusing the patterned photoresist film as an etch mask.

Then, the isolation area of the semiconductor substrate can be etched toa predetermined depth, thereby forming a trench. The substrate can beetched using the patterned pad oxide layer, pad nitride layer and TEOSoxide layer as an etch mask. After that, the photoresist film can becompletely removed.

Then, insulating materials can be filled in the trench, thereby formingthe isolation layer 103. After that, the pad oxide layer, the padnitride layer and the TEOS oxide layer can be removed.

Referring to FIG. 4B, a first photoresist film 104 can be coated on theentire surface of the semiconductor substrate 101 formed with theisolation layer 103. Then, the first photoresist film 104 can beselectively patterned through an exposure and development process toexpose a portion of a photodiode area on the semiconductor substrate101.

Subsequently, the exposed semiconductor substrate 101 can be selectivelyetched using the patterned first photoresist film 104 as an etch mask toform a plurality of trenches 105 on the photodiode area The trenches 105can have predetermined depths and can be spaced apart from each other bya predetermined interval.

Then, as shown in FIG. 4C, after removing the first photoresist film104, a gate insulating layer and a conductive layer (for instance, ahigh density multi-crystalline silicon layer) can be sequentiallydeposited on the entire surface of the epitaxial layer 102 formed withthe isolation layer 103. In an embodiment, the gate insulating layer 106can be formed through a thermal oxidation process or a chemical vapordeposition (CVD) process.

The conductive layer and the gate insulating layer 106 can beselectively removed to form a gate electrode 107.

The gate electrode 107 serves as a gate electrode of the transfertransistor.

Referring to FIG. 4D, a second photoresist film 108 can be coated on theentire surface of the semiconductor substrate 101 including the gateelectrode 107. The second photoresist film 108 can be patterned throughan exposure and development process to expose the photoresist area

Then, a low-density first conductive type (in this case n⁻ type) dopantcan be implanted into the epitaxial layer 102 using the patterned secondphotoresist film 108 as a mask to form n⁻ type diffusion region 109.

Referring to FIG. 4E, an insulating layer can be formed on the entiresurface of the semiconductor substrate 101 including the gate electrode107, and then an etch back process can be performed to form a spacer110.

Then, a third photoresist film 111 can be coated on the semiconductorsubstrate 101 including the gate electrode 107. The third photoresistfilm 111 can be patterned through an exposure and development process toexpose a drain area of the transistor.

A high-density first conductive type (in this case n⁺ type) dopant canbe implanted into the exposed drain area using the patterned thirdphotoresist film 111 as a mask to form n⁺ type diffusion region 112(floating diffusion region).

Then, as shown in FIG. 4F, after removing the third photoresist film111, a fourth photoresist film 113 can be coated on the entire surfaceof the semiconductor substrate 101. The fourth photoresist film 113 canbe patterned through an exposure and development process to expose thephotodiode area.

After that, a second conductive type (in this case p⁰ type) dopant canbe implanted into the epitaxial layer 102 formed with the n⁻ typediffusion region 109 by using the patterned fourth photoresist film 113as a mask to form p⁰ type diffusion region 114 on the surface of theepitaxial layer 102 formed with the trench 105.

Then, as shown in FIG. 4G, the fourth photoresist film 113 can beremoved and the semiconductor substrate 101 can be subject to aheat-treatment process so as to diffuse each impurity diffusion region.

After that, although not illustrated in figures, a plurality of metalinterconnections including interlayer dielectric layers can be formed onthe entire surface of the resultant structure, and then a color filterlayer and a micro-lens can be formed to form an image sensor.

As described above, the CMOS image sensor and the manufacturing methodthereof according to embodiments of the present invention representfollowing advantages.

That is, according to embodiments of the present invention, a pluralityof trenches having a predetermined depth can be formed on the photodiodearea through an etching process, and a p⁰ type diffusion region can beformed on the surface of the plurality of trenches, so that a surfacearea of the depletion layer of the photodiode can be enlarged.Accordingly, capacitance of the photodiode can be increased, so that thesaturation level of the unit pixel can be improved.

It will be apparent to those skilled in the art that variousmodifications and variations can be made in the present invention. Thus,it is intended that the present invention covers the modifications andvariations of this invention provided they come within the scope of theappended claims and their equivalents.

1. A CMOS image sensor comprising: a semiconductor substrate having aphotodiode area and a transistor area; a trench area formed in thephotodiode area; a transistor and a floating diffusion region formed onthe transistor area; a first conductive type diffusion region formed onthe photodiode area; and a second conductive type diffusion regionformed on the trench area above the first conductive type diffusionregion.
 2. The CMOS image sensor according to claim 1, wherein aplurality of trenches are formed in the trench area.
 3. The CMOS imagesensor according to claim 1, wherein the semiconductor substratecomprises a second conductive type semiconductor substrate.
 4. The CMOSimage sensor according to claim 1, wherein the floating diffusion regioncomprises a first conductive type floating diffusion region.
 5. The CMOSimage sensor according to claim 1, wherein the transistor comprises agate insulating layer, a gate electrode formed on the gate insulatinglayer, and a spacer formed at a side of the gate electrode.
 6. The CMOSimage sensor according to claim 1, wherein the first conductive type isn type, and the second conductive type is p type.
 7. A CMOS image sensorcomprising: a semiconductor substrate having an active area and anisolation area; a photodiode area and a floating diffusion region formedin the active area; a transfer transistor for transferring photo-chargesfrom the photodiode area to the floating diffusion region; and aplurality of trenches formed on a surface of the photodiode area.
 8. TheCMOS image sensor according to claim 7, wherein the photodiode areacomprises: a first conductive type diffusion region, and a secondconductive type diffusion region formed in the plurality of trenches atan upper portion of the first conductive diffusion region.
 9. The CMOSimage sensor according to claim 7, wherein the photodiode areacomprises: a second conductive type diffusion area formed on a surfaceof the photodiode area, and a first conductive type diffusion areaformed at a lower portion of the transfer transistor.
 10. The CMOS imagesensor according to claim 7, wherein the semiconductor substratecomprises a second conductive type semiconductor substrate.
 11. The CMOSimage sensor according to claim 7, wherein the floating diffusion regioncomprises a first conductive type floating diffusion region.
 12. TheCMOS image sensor according to claim 7, wherein the transfer transistorcomprises a gate insulating layer, a gate electrode formed on the gateinsulating layer, and a spacer formed at a side of the gate electrode.13. The CMOS image sensor according to claim 8, wherein the firstconductive type is n type, and the second conductive type is p type. 14.A method for forming a CMOS image sensor, comprising: defining aphotodiode area on an active area of a semiconductor substrate andforming a plurality of trenches in the photodiode area; forming a gateinsulating layer and a gate electrode on the active area; forming afirst conductive type diffusion region by implanting a dopant into thephotodiode area; forming a spacer at a side of the gate electrode;forming a first conductive type floating diffusion region by implantinga dopant into the active area; and forming a second conductive typediffusion region by implanting a dopant into the photodiode area
 15. Themethod according to claim 14, wherein the photodiode area is formed on afirst side of the gate electrode, and the floating diffusion area isformed on a second side of the gate electrode.
 16. The method accordingto claim 14, wherein the first conductive type is n type and the secondconductive type is p type.